교원프로필

백창기 사진
교원에 대한 정보를 나타내는 표입니다.
성명 백창기
소속 창의IT융합공학과
전화번호 279-8893
E-mail BAEKCK@POSTECH.AC.KR
Homepage http://idea.postech.ac.kr/

학력

  • 2002~2008 서울대학교 (졸업-)
  • 2000~2002 포항공과대학교 (졸업-전자전기공학)
  • 1992~1999 충남대학교 (졸업-전자공학과)

주요경력

  • 2010~2014 : 포항공과대학교 창의IT융합공학과
  • 2008~2010 : 한국과학기술원 부설 고등과학원

전문분야

학술지

국제전문학술지

  • Variability study of Si nanowire FETs with different junction gradients, AIP advances, , 6, - (2016)
  • Effects of single grain boundary and random interface traps on electrical variations of sub-30 nm polysilicon nanowire structures, MICROELECTRONIC ENGINEERING, , 149, 113-116 (2016)
  • Statistical variability study of random dopant fluctuation on gate-all-around inversion-mode silicon nanowire field-effect transistors, APPLIED PHYSICS LETTERS, , 106, - (2015)
  • Junction Design Strategy for Si Bulk FinFETs for System-on-Chip Applications Down to the 7-nm Node, IEEE ELECTRON DEVICE LETTERS, , 36, 994-996 (2015)
  • Three-dimensional simulation of threshold voltage variations due to an oblique single grain boundary in sub-40nm polysilicon nanowire FETs, SEMICONDUCTOR SCIENCE AND TECHNOLOGY, , 30, - (2015)
  • Chemical Gated Field Effect Transistor by Hybrid Integration of One-Dimensional Silicon Nanowire and Two-Dimensional Tin Oxide Thin Film for Low Power Gas Sensor, ACS APPLIED MATERIALS & INTERFACES, , 7, 21263-21269 (2015)
  • Investigation of RC Parasitics Considering Middle-of-the-Line in Si-Bulk FinFETs for Sub-14-nm Node Logic Applications, IEEE TRANSACTIONS ON ELECTRON DEVICES, , 62, 3441-3444 (2015)
  • High efficiency silicon solar cell based on asymmetric nanowire, SCIENTIFIC REPORTS, , 5, - (2015)
  • Silicon Nanowire Biologically Sensitive Field Effect Transistors: Electrical Characteristics and Applications, Journal of Nanoscience and Nanotechnology, , 14, 273-287 (2014)
  • Optimized operation of silicon nanowire field effect transistor sensors, NANOTECHNOLOGY, , 25, - (2014)
  • Threshold Voltage Variations Due to Oblique Single Grain Boundary in Sub-50-nm Polysilicon Channel, IEEE TRANSACTIONS ON ELECTRON DEVICES, , 61, 2705-2710 (2014)
  • Single-crystalline CdTe nanowire field effect transistors as nanowire-based photodetector, PHYSICAL CHEMISTRY CHEMICAL PHYSICS, , 16, 22687-22693 (2014)
  • Vertical gate-all-around junctionless nanowire transistors with asymmetric diameters and underlap lengths, APPLIED PHYSICS LETTERS, , 105, - (2014)
  • Thermally Phase-Transformed In2Se3 Nanowires for Highly Sensitive Photodetectors, SMALL, , 10, 3795-3802 (2014)
  • Investigation of Low-Frequency Noise in p-type Nanowire FETs: Effect of Switched Biasing Condition and Embedded SiGe Layer, IEEE ELECTRON DEVICE LETTERS, , 35, 702-704 (2014)
  • Universal relaxation characteristic of interface trap under FN and NBTI stress in pMOSFET device, ELECTRONICS LETTERS, , 50, 1877-U245 (2014)
  • Improved performance of In2Se3 nanowire phase-change memory with SiO2 passivation, Solid-State Electronics, , 80, - (2013)
  • Analytic Model of S/D Series Resistance in Trigate FinFETs with Polygonal Epitaxy, IEEE TRANSACTIONS ON ELECTRON DEVICES, , 60, 1302-1309 (2013)
  • Investigation of the electrical stability of Si-nanowire biologically sensitive field-effect transistors with embedded Ag/AgCl pseudo reference electrode, RSC Advances, , 3, 7963-7969 (2013)
  • Simple Source/Drain Series Resistance Extraction Method Optimized for Nanowire, IEEE ELECTRON DEVICE LETTERS, , 34, 828-830 (2013)
  • Improved Electrical Characteristics of Honeycomb-Nanowire ISFETs, IEEE ELECTRON DEVICE LETTERS, , 34, 1059-1061 (2013)
  • Study on a Scaling Length Model for Tapered Tri-gate FinFET based on 3-D Simulation and Analytical Analysis, IEEE TRANSACTIONS ON ELECTRON DEVICES, , 60, 2721-2727 (2013)
  • Investigation of electromigration in In2Se3 nanowire for phase change memory devices, APPLIED PHYSICS LETTERS, , 103, - (2013)
  • Electrical characteristics of 20-nm junctionless Si nanowire transistors, Solid-State Electronics, , 73, - (2012)
  • Optical and electrical characteristics of asymmetric nanowire solar cells, JOURNAL OF APPLIED PHYSICS, , 111, - (2012)
  • Characteristics of gate-all-around silicon nanowire field effect transistors with asymmetric channel width and source/drain doping concentration, JOURNAL OF APPLIED PHYSICS, , 112, - (2012)
  • Device Design Guidelines for Nanoscale FinFETs in RF/Analog Applications, IEEE ELECTRON DEVICE LETTERS, , 33, 1234-1236 (2012)
  • Characterization of Channel Diameter Dependent Low Frequency Noise in Silicon Nanowire Field Effect Transistors, IEEE ELECTRON DEVICE LETTERS, , 33, 1348-1350 (2012)
  • Characterization and Modeling of 1/f Noise in Si-nanowire FETs _ Effects of Cylindrical Geometry and Different Processing of Oxides, IEEE TRANSACTIONS ON NANOTECHNOLOGY, , 10, 417-423 (2011)
  • C-V Characteristics in Undoped Gate-All-Around Nanowire FET Array, IEEE ELECTRON DEVICE LETTERS, , 32, 116-118 (2011)
  • An Analysis of the Field Dependence of Interface Trap Generation under Negative Bias Temperature Instability Stress using Wentzel- Kramers Brillouin with Density Gradient Method, Japanese Journal of Applied Physics, , 50, - (2011)
  • A 3-D Statistical Simulation Study of Mobility Fluctuations in MOSFET Induced by Discrete Trapped Charges in SiO2 Layer, IEEE TRANSACTIONS ON NANOTECHNOLOGY, , 10, 699-705 (2011)
  • Interfacial-Layer-Driven Dielectric Degradation and Breakdown of HfSiON/SiON Gate Dielectric nMOSFETs, IEEE ELECTRON DEVICE LETTERS, , 32, 1319-1321 (2011)
  • Silicon nanowire ion sensitive field effect transistor with integrated Ag/AgCl electrode: pH sensing and noise characteristics, Analyst, , 136, 5012-5016 (2011)
  • Comprehensive Study of Quasi-Ballistic Transport in High-k/Metal Gate nMOSFETs, IEEE ELECTRON DEVICE LETTERS, , 32, 1474-1476 (2011)
  • New Investigation of Hot Carrier Degradation on RF Small-Signal Parameter and Performance in High-k/Metal Gate nMOSFETs, IEEE ELECTRON DEVICE LETTERS, , 32, 1668-1670 (2011)
  • Characteristics of the Series Resistance Extracted from Si-Nanowire FETs using the Y-function Technique, IEEE TRANSACTIONS ON NANOTECHNOLOGY, , 9, 212-217 (2010)
  • Comparison of Series Resistance and Mobility Degradation Extracted from n- and p-type Si-NWFETs Using the Y-function Technique, JAPANESE JOURNAL OF APPLIED PHYSICS, , 49, - (2010)
  • Characterization of Near-Interface Oxide Trap Density in Nitrided Oxides for Nano-Scale MOSFET Applications, IEEE TRANSACTIONS ON NANOTECHNOLOGY, , 8, 654-658 (2009)
  • A Comparative Study of the DRAM Leakage Mechanism for Planar and Recessed Channel MOSFETs, SOLID-STATE ELECTRONICS, , 53, 998-1000 (2009)
  • Three-dimensional Simulation of Dopant Fluctuation Induced Threshold Voltage Dispersion in Non-planar MOS Structures Targeting Flash EEPROM Transistors, IEEE TRANSACTIONS ON ELECTRON DEVICES, , 55, 1456-1463 (2008)
  • A Proposal on an Optimized Device Structure With Experimental Studies on Recent Devices for the DRAM Cell Transistor, IEEE TRANSACTIONS ON ELECTRON DEVICES, , 54, 3325-3335 (2007)
  • Edge Profile Effect of Tunnel Oxide on Erase Threshold Voltage Distributions in Flash Memory Cells, IEEE TRANSACTIONS ON ELECTRON DEVICES, , 53, 3012-3019 (2006)
  • Reliable Extraction of Cycling Induced Interface States Implementing Realistic P/E Stresses in Reference Cell: Comparison with Flash Memory Cell, IEEE ELECTRON DEVICE LETTERS, , 27, 169-171 (2006)
  • Design Technique for Ramped Gate Soft-Programming in Over-Erased NOR Type Flash EEPROM Cells, JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS & EXPRESS LETTERS, , 44, L578-L580 (2005)
  • Simple Experimental Determination of the Spread of Trapped Hot Holes Injected in Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) Cells: Optimized Erase and Cell Shrinkage, JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS & EXPRESS LETTERS, , 43, L1611-L1613 (2004)
  • Spatial and Temporal Characterization of Programming Charge in SONOS Memory Cell: Effects of Localized Electron Trapping, JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS & EXPRESS LETTERS, , 43, L1581-L1583 (2004)
  • High Speed, Low Power Programming in 0.17mum Channel Length NOR-type Floating Gate Flash Memory Cell Free of Drain Turn-On Effects, JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS, , 43, L224-L226 (2004)

국내전문학술지

일반학술지

학술회의논문

학회발표

  • The Statistical Distribution of Electrical Characteristics with Random Grain Boundary in Vertical NAND Unit Cells, ., 0, 0, - (2015)
  • Various Heterojunction Single Gate Tunneling FETs with Graded Channel Doping in Sub-40 nm Channels, ., 0, 0, - (2015)
  • The Variability due to Random Discrete Dopant and Grain Boundaryin 3D NAND Unit Cell, ., 0, 0, - (2014)
  • Noise Consideration for Cancer Marker Detection Using Nanowire Sensors, ., 0, 0, - (2014)
  • 3D Simulation of Threshold Voltage Variations Due to Random Grain Boundary and Discrete Dopants in Sub-20 nm Gate-All-Around Poly-SiTransistor, ., 0, 0, - (2014)
  • Silicon Nanowire and its Application, ., 0, 0, - (2013)
  • Characterization of Low Frequency Noise in Nanowire FETs Considering Variability and Quantum Effects, ., 0, 0, - (2013)
  • Characterization of Silicon Nanowire Biosensors and Solar Cells, ., 0, 0, - (2012)
  • Modeling and Analysis of the Parasitic Series Resistance in Raised Source/Drain FinFETs with Polygonal Epitaxy, ., 0, 0, - (2012)
  • An Improved 3D Monte Carlo Simulation of Reaction Diffusion Model for Accurate Prediction of the NBTI Stress/Relaxation, ., 0, 0, - (2012)
  • Determination of Operation Region in Silicon-Nanowire BioFETs to Maximize Signal-to-Noise Ratio, ., 0, 0, - (2012)
  • Intrinsic Reliability Improvement of SiGe Quantum Well pMOSFETs, ., 0, 0, - (2012)
  • Si Thin Film Solar Cell with Asymmetric P-N Junction, ., 0, 0, - (2012)
  • Analysis of Bottom Channel Effect in Silicon Nanowire FET based on Bulk-Silicon: Reduction of Parasitic Capacitance caused by SiGe layer, ., 0, 0, - (2011)
  • Fabrication and Characterization of Gate-All-Around Silicon Nanowire Field Effect Transistors, ., 0, 0, - (2011)
  • Analysis of Parasitic Bottom Capacitance in n- and p-type Si-Nanowire Field Effect Transistors on Bulk, ., 0, 0, - (2011)
  • Comparative study of fabricated junctionless and inversion-mode nanowire FETs, ., 0, 0, - (2011)
  • pH Sensing and Noise Characteristics of Si Nanowire Ion-Sensitive Field Effect Transistors, ., 0, 0, - (2011)
  • Universality in the Interface Trap Relaxation of NBTI and FN Stress: Measurement by Subthreshold Slope Method on nMOSFET and Its Modeling, ., 0, 0, - (2011)
  • Characteristics and modeling of Si-nanowire FETs, ., 0, 0, - (2010)
  • Comparative study of C-V characteristics in Si-NWFET and MOSFET, ., 0, 0, - (2010)
  • C-V Characteristics and Analysis of Undoped Gate-All-Around Nanowire FET Array, ., 0, 0, - (2010)
  • 3D Simulation of NBTI in pMOSFET’s Including Discrete Interface and Oxide Traps Generation, ., 0, 0, - (2010)
  • Accurate Extraction of Volume Trap Density from Si-Nanowire FET using the Newly Developed Cylindrical Coordinate Based 1/f Noise Model, ., 0, 0, - (2010)

단행본

연구실적

  • 산업용 폐열 회수를 위한 열전발전 시스템 개발, 미래창조과학부 (2015-2015)
  • 고성능 모바일 수질 센서 시스템 기술 개발, (주)포스코 (2015-2016)

IP

  • 임태욱,박병규,백창기,김재준, 세포 감별 계수기 및 세포 감별 계수 방법, 한국, 10-2015-0154634 (2015)
  • 이정수,정윤하,임태욱,김기현,김성호,백창기, 3차원 적층 구조의 나노선을 구비한 나노선 전계효과 센서, USA, 14/648,969 (2015)
  • 김기현,백창기,임태욱,윤준식, 비대칭 수직 나노선 어레이를 이용한 열전소자 및 이의 제조방법, 한국, 10-2015-0127219 (2015)
  • 임태욱,김재준,백창기, 전자 소자, USA, 14/751,290 (2015)
  • 백창기,고명동,임태욱, 나노선 전계효과 트랜지스터 및 이의 제조방법, USA, 14/385,450 (2014)
  • 백창기,고명동,임태욱, 나노선 전계효과 트랜지스터 및 이의 제조방법, USA, 14/385,450 (2014)
  • 백창기,고명동,정윤하,임태욱,박수영,최성욱, 태양전지 및 이의 제조방법, 중국, 201280049982.2 (2014)
  • 백창기,고명동,정윤하,임태욱,박수영,최성욱, 태양전지 및 이의 제조방법, 중국, 추후통지 (2014)
  • 정윤하,고명동,백창기,임태욱,박수영,최성욱, 태양전지 및 이의 제조방법, 일본, 2014-527062 (2014)
  • 백창기,고명동,정윤하,임태욱,박수영,최성욱, 태양전지 및 이의 제조방법, 일본, 추후통지 (2014)
  • 정윤하,고명동,백창기,임태욱,박수영,최성욱, 태양전지 및 이의 제조방법, 일본, 2014-527062 (2014)
  • 백창기,고명동,정윤하,임태욱,박수영,최성욱, 태양전지 및 이의 제조방법, USA, 14/239,693 (2014)
  • 백창기,고명동,정윤하,임태욱,박수영,최성욱, 태양전지 및 이의 제조방법, EP, 12825711.0 (2014)
  • 임태욱,김재준,백창기, 전자 소자, 한국, 10-2014-0080076 (2014)
  • 이정수,정윤하,임태욱,김기현,김성호,백창기, 3차원 적층 구조의 나노선을 구비한 나노선 전계효과 센서, -, PCT/KR2013/0106 (2013)
  • 이정수,김성호,임태욱,김기현,정윤하,백창기, 네트워크 구조의 나노선을 구비한 나노선 센서 및 그 제조방법, 중국, 201280018389.1 (2013)
  • 이정수,김성호,임태욱,김기현,정윤하,백창기, 네트워크 구조의 나노선을 구비한 나노선 센서 및 그 제조방법, USA, 14/111,727 (2013)
  • 이정수,김성호,임태욱,김기현,정윤하,백창기, 네트워크 구조의 나노선을 구비한 나노선 센서 및 그 제조방법, USA, 14/111,727 (2013)
  • 백창기,고명동,임태욱, 나노선 전계효과 트랜지스터 및 이의 제조방법, -, PCT/KR2013/0019 (2013)
  • 백창기,임태욱,고명동, 나노선 전계효과 트랜지스터 및 이의 제조방법, 한국, 10-2012-0077624 (2013)
  • 백창기,고명동,정윤하,임태욱,박수영,최성욱, 태양전지 및 이의 제조방법, -, PCT/KR2012/0065 (2012)
  • 백창기,임태욱,고명동, 비대칭형 채널 구조 및 소스 드레인의 불순물 농도가 상이한 나노선 전계효과 트랜지스터, 한국, 10-2012-0025726 (2012)
  • 이정수,임태욱,백창기,김성호,김기현,정윤하, 3차원 적층 구조의 나노선을 구비한 나노선 전계효과 센서, 한국, 10-2012-0140109 (2012)
  • 이정수,임태욱,백창기,김성호,김기현,정윤하, 3차원 적층 구조의 나노선을 구비한 나노선 전계효과 센서, 한국, 10-2012-0140109 (2012)
  • 이정수,김성호,임태욱,김기현,정윤하,백창기, 네트워크 구조의 나노선을 구비한 나노선 센서 및 그 제조방법, -, PCT/KR2012/0019 (2012)
  • 백창기,임태욱,고명동,정윤하, 태양전지 및 이의 제조방법, 한국, 10-2011-0083105 (2011)
  • 이정수,임태욱,정윤하,김성호,김기현,백창기, 네트워크 구조의 나노선을 구비한 나노선 센서 및 그 제조방법, 한국, 10-2011-0034860 (2011)